#!/usr/bin/env python3 # -*- coding: utf-8 -*- """AMD AAI2026 全栈 AI 基础设施 · 技术架构师版 12 页 .pptx 目标受众：AI 基础设施架构师 / 采购技术决策者 / 性能工程师 风格：技术深度优先，参数密度高，配图 / 拓扑 / 协议栈为主 输出：/var/www/html/share/AMD-AAI2026-演示-技术架构师版.pptx """ import os from pptx import Presentation from pptx.util import Inches, Pt, Emu from pptx.dml.color import RGBColor from pptx.enum.shapes import MSO_SHAPE from pptx.enum.text import PP_ALIGN, MSO_ANCHOR from pptx.oxml.ns import qn from lxml import etree # ---- 品牌色 ---- AMD_RED = RGBColor(0xED, 0x1C, 0x24) AMD_DARK = RGBColor(0xC8, 0x18, 0x1F) NV_GREEN = RGBColor(0x76, 0xB9, 0x00) DARK = RGBColor(0x1A, 0x1F, 0x2A) GREY = RGBColor(0x5A, 0x64, 0x78) LIGHT = RGBColor(0xE7, 0xEA, 0xF0) PANEL = RGBColor(0xF7, 0xF8, 0xFA) WHITE = RGBColor(0xFF, 0xFF, 0xFF) WARN = RGBColor(0xD4, 0x4A, 0x3A) ACCENT_BLUE = RGBColor(0x0B, 0x66, 0xC3) CN_FONT = "Noto Sans CJK SC" IMG_DIR = "/var/www/html/share/helios-imgs" OUT_PPTX = "/var/www/html/share/AMD-AAI2026-演示-技术架构师版.pptx" SLIDE_W = Inches(13.333) SLIDE_H = Inches(7.5) def add_rect(slide, x, y, w, h, fill, line=None, line_w=None): shp = slide.shapes.add_shape(MSO_SHAPE.RECTANGLE, x, y, w, h) shp.fill.solid(); shp.fill.fore_color.rgb = fill if line is None: shp.line.fill.background() else: shp.line.color.rgb = line if line_w is not None: shp.line.width = line_w shp.shadow.inherit = False return shp def add_text(slide, x, y, w, h, text, *, size=18, bold=False, color=DARK, align=PP_ALIGN.LEFT, anchor=MSO_ANCHOR.TOP, font=CN_FONT): tb = slide.shapes.add_textbox(x, y, w, h) tf = tb.text_frame tf.margin_left = Inches(0.08); tf.margin_right = Inches(0.08) tf.margin_top = Inches(0.04); tf.margin_bottom = Inches(0.04) tf.word_wrap = True tf.vertical_anchor = anchor lines = text.split("\n") if isinstance(text, str) else [str(text)] for i, ln in enumerate(lines): p = tf.paragraphs[0] if i == 0 else tf.add_paragraph() p.alignment = align run = p.add_run() run.text = ln run.font.size = Pt(size) run.font.bold = bold run.font.name = font rPr = run._r.get_or_add_rPr() ea = rPr.find(qn('a:ea')) if ea is None: ea = etree.SubElement(rPr, qn('a:ea')) ea.set('typeface', CN_FONT) run.font.color.rgb = color return tb def add_title_bar(slide, title, subtitle=None): """深色技术风标题条（与投资者版区分）""" add_rect(slide, 0, 0, SLIDE_W, Inches(0.9), DARK) add_rect(slide, 0, 0, Inches(0.15), Inches(0.9), AMD_RED) # 左侧红色窄条 add_text(slide, Inches(0.4), Inches(0.1), SLIDE_W - Inches(1), Inches(0.55), title, size=24, bold=True, color=WHITE, anchor=MSO_ANCHOR.MIDDLE) if subtitle: add_text(slide, Inches(0.4), Inches(0.5), SLIDE_W - Inches(1), Inches(0.38), subtitle, size=11, color=LIGHT, anchor=MSO_ANCHOR.TOP) def add_footer(slide, page_num, total=12): add_rect(slide, 0, SLIDE_H - Inches(0.35), SLIDE_W, Inches(0.35), RGBColor(0xF2, 0xF3, 0xF6)) add_text(slide, Inches(0.4), SLIDE_H - Inches(0.32), Inches(11), Inches(0.3), "数据来源：AMD IR / Spec.org / Helios 客户声明 + Semianalysis / TrendForce 工程报道", size=9, color=GREY, anchor=MSO_ANCHOR.MIDDLE) add_text(slide, SLIDE_W - Inches(1.0), SLIDE_H - Inches(0.32), Inches(0.7), Inches(0.3), f"{page_num} / {total}", size=10, color=GREY, align=PP_ALIGN.RIGHT, anchor=MSO_ANCHOR.MIDDLE) def safe_img(slide, path, x, y, w, h): try: if os.path.exists(path): slide.shapes.add_picture(path, x, y, width=w, height=h) return True except Exception: pass return False def add_table(slide, x, y, col_w, headers, rows, *, row_h=Inches(0.45), header_fill=LIGHT, header_color=DARK, stripe=True, font_size=11, color_alt=PANEL, col_color=None): """通用表格：col_color 可指定每列文字色""" total_w = sum(col_w, Inches(0)) # 表头 add_rect(slide, x, y, total_w, row_h, header_fill, line=LIGHT, line_w=Pt(0.5)) cx = x for ci, h in enumerate(headers): col = (col_color[ci] if col_color and ci < len(col_color) and col_color[ci] else header_color) bold = (col_color is None or ci == 0) add_text(slide, cx, y, col_w[ci], row_h, h, size=font_size, bold=True, color=col, align=PP_ALIGN.CENTER, anchor=MSO_ANCHOR.MIDDLE) cx += col_w[ci] # 数据行 for ri, row in enumerate(rows): ry = y + row_h * (ri + 1) fill = color_alt if (stripe and ri % 2 == 0) else WHITE add_rect(slide, x, ry, total_w, row_h, fill, line=LIGHT, line_w=Pt(0.5)) cx = x for ci, cell in enumerate(row): col = (col_color[ci] if col_color and ci < len(col_color) and col_color[ci] else DARK) bold = (col_color is not None and ci in (1, 2)) add_text(slide, cx, ry, col_w[ci], row_h, cell, size=font_size, bold=bold, color=col, anchor=MSO_ANCHOR.MIDDLE, align=PP_ALIGN.LEFT if ci > 0 else PP_ALIGN.CENTER) cx += col_w[ci] # ============================================================ prs = Presentation() prs.slide_width = SLIDE_W prs.slide_height = SLIDE_H BLANK = prs.slide_layouts[6] # ============================================================ # Slide 1 · 封面 · 技术架构师版 # ============================================================ s = prs.slides.add_slide(BLANK) add_rect(s, 0, 0, SLIDE_W, SLIDE_H, DARK) # 顶部 AMD 红条 add_rect(s, 0, 0, SLIDE_W, Inches(0.3), AMD_RED) # 底部装饰网格（示意拓扑） for i in range(7): add_rect(s, Inches(0.5 + i * 1.8), Inches(5.4), Inches(1.5), Inches(1.5), RGBColor(0x2A, 0x32, 0x44)) add_text(s, Inches(0.5), Inches(1.2), Inches(12), Inches(0.5), "AMD AAI2026 · Technical Architect Edition", size=18, bold=True, color=AMD_RED) add_text(s, Inches(0.5), Inches(1.9), Inches(12), Inches(1.6), "全栈 AI 基础设施深度技术报告", size=48, bold=True, color=WHITE) add_text(s, Inches(0.5), Inches(3.4), Inches(12), Inches(0.7), "Helios 机柜级 · MI455X · Venice · UALoE · ROCm 7", size=22, color=LIGHT) add_text(s, Inches(0.5), Inches(6.95), Inches(12), Inches(0.4), "2026-07-24 · 目标受众：AI 基础设施架构师 / 采购技术决策者", size=12, color=GREY) # ============================================================ # Slide 2 · TL;DR（技术版）· 5 项关键技术事实 # ============================================================ s = prs.slides.add_slide(BLANK) add_title_bar(s, "TL;DR · 5 项架构师必须知道的技术事实", "面向系统设计 / 容量规划 / 互联拓扑") facts = [ ("CDNA 5", "2nm XCD + N3P IOD", "320 亿晶体管\n3D 混合键合"), ("HBM4", "432 GB / 卡", "12-Hi 堆叠\n23.3 TB/s"), ("CPU", "Zen 6 Venice", "256C / 512T\n1.6 TB/s"), ("Scale-up", "UALoE 260 TB/s","Ultra Ethernet\nUALink 联盟"), ("Scale-out", "Vulcano 800G","3×/GPU\nPCIe 6.0"), ] for i, (k, big, sub) in enumerate(facts): x = Inches(0.4 + i * 2.6) add_rect(s, x, Inches(1.3), Inches(2.4), Inches(2.4), PANEL, line=LIGHT, line_w=Pt(0.75)) add_rect(s, x, Inches(1.3), Inches(2.4), Inches(0.5), AMD_RED) add_text(s, x, Inches(1.3), Inches(2.4), Inches(0.5), k, size=13, bold=True, color=WHITE, align=PP_ALIGN.CENTER, anchor=MSO_ANCHOR.MIDDLE) add_text(s, x, Inches(1.85), Inches(2.4), Inches(0.7), big, size=18, bold=True, color=DARK, align=PP_ALIGN.CENTER, anchor=MSO_ANCHOR.MIDDLE) add_text(s, x, Inches(2.55), Inches(2.4), Inches(1.1), sub, size=11, color=GREY, align=PP_ALIGN.CENTER, anchor=MSO_ANCHOR.MIDDLE) # 底部架构师视角解读 add_rect(s, Inches(0.4), Inches(4.0), Inches(12.5), Inches(2.85), RGBColor(0xFE, 0xF6, 0xF4), line=LIGHT, line_w=Pt(0.5)) add_text(s, Inches(0.6), Inches(4.15), Inches(12.1), Inches(0.5), "架构师视角解读", size=18, bold=True, color=AMD_RED) add_text(s, Inches(0.6), Inches(4.7), Inches(12.1), Inches(2.1), ("• 单卡 432 GB HBM4 = 一次能装下 70B 参数模型（FP16 140 GB）的 KV cache + 权重，无需 offload\n" "• UALoE 260 TB/s scale-up = NVL72 接近水平，但走开放以太网，可多供应商\n" "• Zen 6 Venice 256C = 单机架 18 颗 CPU = 4608 物理核，云原生调度粒度比 NV 更细\n" "• Vulcano 3×800G/GPU = 单机架 scale-out 接入 2.4 Tbps/GPU，对 MoE all-to-all 友好\n" "• ROCm 7 + Gorgon Halo = 推理调度器，但与 CUDA 9 成以上兼容仍是 12 个月内最大风险"), size=13, color=DARK) add_footer(s, 2) # ============================================================ # Slide 3 · MI455X 架构深拆 # ============================================================ s = prs.slides.add_slide(BLANK) add_title_bar(s, "MI455X 架构深拆 · CDNA 5 / 2 nm / 320 亿晶体管", "XCD + IOD 异构封装 · 12-Hi HBM4 · PCIe 6.0") # 左侧：die 实物 img_ok = safe_img(s, f"{IMG_DIR}/wx-helios-10.webp", Inches(0.4), Inches(1.2), Inches(6.4), Inches(4.5)) if not img_ok: add_rect(s, Inches(0.4), Inches(1.2), Inches(6.4), Inches(4.5), PANEL, line=LIGHT, line_w=Pt(0.75)) # 右侧：技术规格 5 行 add_text(s, Inches(7.1), Inches(1.2), Inches(5.8), Inches(0.4), "封装与制程", size=16, bold=True, color=AMD_RED) specs = [ ("XCD 芯粒", "TSMC N2 2 nm GAA · 4 颗 chiplet"), ("IOD I/O Die", "TSMC N3P · 中央 1 颗"), ("晶体管", "320 亿（XCD + IOD 合计）"), ("互联", "3D 混合键合 hybrid bonding + 高级封装"), ("板级形态", "OAM 模块 · PCIe Gen 6 · UALink 物理层"), ] for i, (k, v) in enumerate(specs): y = Inches(1.7 + i * 0.7) add_rect(s, Inches(7.1), y, Inches(5.8), Inches(0.6), PANEL if i % 2 == 0 else WHITE, line=LIGHT, line_w=Pt(0.5)) add_text(s, Inches(7.25), y, Inches(1.5), Inches(0.6), k, size=12, bold=True, color=AMD_RED, anchor=MSO_ANCHOR.MIDDLE) add_text(s, Inches(8.85), y, Inches(4.0), Inches(0.6), v, size=11, color=DARK, anchor=MSO_ANCHOR.MIDDLE) # 底部架构师注记 add_text(s, Inches(7.1), Inches(5.5), Inches(5.8), Inches(0.4), "架构师注记", size=14, bold=True, color=AMD_RED) add_text(s, Inches(7.1), Inches(5.95), Inches(5.8), Inches(0.9), ("• 2nm 节点首批 AMD 量产 GPU，2H 2026 良率待观察\n" "• Hybrid bonding 互联距离更短 → 信号完整性更好"), size=11, color=DARK) add_footer(s, 3) # ============================================================ # Slide 4 · HBM4 内存子系统 # ============================================================ s = prs.slides.add_slide(BLANK) add_title_bar(s, "HBM4 内存子系统 · 432 GB / 23.3 TB/s", "12-Hi 堆叠 · vs MI355X +50% 容量 / +2.9× 带宽") # 顶部参数卡 3 个 kpis = [ ("432", "GB", "HBM4 / 卡"), ("23.3", "TB/s", "峰值带宽"), ("12", "Hi", "堆叠层数"), ] for i, (big, unit, desc) in enumerate(kpis): x = Inches(0.4 + i * 4.3) add_rect(s, x, Inches(1.2), Inches(4.0), Inches(1.3), PANEL, line=AMD_RED, line_w=Pt(1.5)) add_text(s, x, Inches(1.25), Inches(2.5), Inches(1.25), big, size=42, bold=True, color=AMD_RED, align=PP_ALIGN.RIGHT, anchor=MSO_ANCHOR.MIDDLE) add_text(s, x + Inches(2.6), Inches(1.25), Inches(1.3), Inches(0.5), unit, size=16, bold=True, color=DARK, anchor=MSO_ANCHOR.MIDDLE) add_text(s, x + Inches(2.6), Inches(1.75), Inches(1.3), Inches(0.5), desc, size=11, color=GREY, anchor=MSO_ANCHOR.TOP) # 中部对比表（4 行） add_text(s, Inches(0.4), Inches(2.75), Inches(12.5), Inches(0.4), "代际对比：MI355X → MI455X", size=14, bold=True, color=AMD_RED) headers = ["指标", "MI355X（上一代）", "MI455X（AAI2026）", "提升"] rows = [ ("HBM 类型", "HBM3E", "HBM4", "新代次"), ("HBM 容量", "288 GB", "432 GB", "+50%"), ("内存带宽", "~8 TB/s（推算）", "23.3 TB/s", "+2.9×"), ("堆叠层数", "8-Hi", "12-Hi", "+50%"), ] add_table(s, Inches(0.4), Inches(3.2), col_w=[Inches(2.5), Inches(3.5), Inches(3.5), Inches(3.0)], headers=headers, rows=rows, row_h=Inches(0.45), col_color=[None, GREY, AMD_RED, None]) # 底部架构师结论 add_text(s, Inches(0.4), Inches(5.85), Inches(12.5), Inches(0.4), "对长上下文 / MoE 推理的意义", size=14, bold=True, color=AMD_RED) add_text(s, Inches(0.4), Inches(6.3), Inches(12.5), Inches(0.7), ("• 70B 模型 FP16 权重 140 GB，432 GB 可装下 3 份完整 KV cache（无 offload）\n" "• 1M token 上下文：KV cache 可达 200+ GB，12-Hi HBM4 是关键承载"), size=11, color=DARK) add_footer(s, 4) # ============================================================ # Slide 5 · EPYC Venice 架构深拆 # ============================================================ s = prs.slides.add_slide(BLANK) add_title_bar(s, "EPYC Venice · Zen 6 / 2 nm / 256C / 1.6 TB/s", "sIOD 拆分 · SP7 插座 · 16ch DDR5 · 离散化封装") # 左侧参数表 headers = ["指标", "EPYC Venice 9996", "NVIDIA Vera"] rows = [ ("微架构", "Zen 6", "Olympus（自研 Arm）"), ("制程", "TSMC 2 nm GAA", "TSMC 3 nm"), ("核心 / 线程", "256C / 512T", "88C / 176T（SMT-X）"), ("插座", "SP7", "LGA 4677"), ("内存", "DDR5 16ch", "LPDDR5X"), ("内存带宽", "1.6 TB/s", "1.2 TB/s"), ("I/O", "PCIe 6.0 / UCIe","PCIe 6.4"), ("晶体管", "203 B（旗舰）", "227 B"), ("单核睿频", "≥5.0 GHz", "—（与 Rubin 紧耦合）"), ] add_table(s, Inches(0.4), Inches(1.2), col_w=[Inches(1.8), Inches(3.0), Inches(3.0)], headers=headers, rows=rows, row_h=Inches(0.45), col_color=[None, AMD_RED, NV_GREEN]) # 右侧：sIOD 拓扑 + 文字 img_ok = safe_img(s, f"{IMG_DIR}/wx-helios-02.webp", Inches(8.4), Inches(1.2), Inches(4.5), Inches(3.2)) if not img_ok: add_rect(s, Inches(8.4), Inches(1.2), Inches(4.5), Inches(3.2), PANEL, line=LIGHT, line_w=Pt(0.75)) add_text(s, Inches(8.4), Inches(4.6), Inches(4.5), Inches(0.4), "sIOD 拆分布局（架构师视角）", size=13, bold=True, color=AMD_RED) add_text(s, Inches(8.4), Inches(5.05), Inches(4.5), Inches(2.0), ("• sIOD 拆分：DDR5 通道 PHY 与 I/O 分别做小芯片\n" "• Infinity Fabric 一致性跨 CCD 与 sIOD\n" "• 96 核运行态下仍可 5.0 GHz 睿频\n" "• 在 Helios 中：18 颗 Venice = 4608 物理核"), size=11, color=DARK) add_footer(s, 5) # ============================================================ # Slide 6 · Helios 机柜级拓扑（深度版） # ============================================================ s = prs.slides.add_slide(BLANK) add_title_bar(s, "Helios 机柜级拓扑 · 72+18 深度拆解", "OCP ORW 44OU · 18 计算托盘 · 6 交换托盘 · 集中供电") # 左：机柜实拍 img_ok = safe_img(s, f"{IMG_DIR}/wx-helios-05.jpg", Inches(0.4), Inches(1.2), Inches(6.0), Inches(4.4)) if not img_ok: add_rect(s, Inches(0.4), Inches(1.2), Inches(6.0), Inches(4.4), PANEL, line=LIGHT, line_w=Pt(0.75)) # 右：拓扑规格 add_text(s, Inches(6.7), Inches(1.2), Inches(6.2), Inches(0.4), "机柜物理参数", size=14, bold=True, color=AMD_RED) phys = [ ("外形", "44 OU 双宽 ORW（Meta 2025 OCP）"), ("尺寸", "约 750 × 1200 × 2400 mm（推算）"), ("冷却", "全液冷（冷板 + COLD/HOT 进出水）"), ("走线", "后部走线 + 顶部黄色 800G 光纤束"), ("电源", "集中供电 + vertical busbar"), ("可维护", "前部面板热拔插 · 计算托盘独立更换"), ("整机功耗", "225–245 kW（液冷强制）"), ("单机架估价", "$5.0–5.5M（行业估）"), ] for i, (k, v) in enumerate(phys): y = Inches(1.7 + i * 0.45) add_rect(s, Inches(6.7), y, Inches(6.2), Inches(0.4), PANEL if i % 2 == 0 else WHITE, line=LIGHT, line_w=Pt(0.5)) add_text(s, Inches(6.85), y, Inches(1.4), Inches(0.4), k, size=11, bold=True, color=AMD_RED, anchor=MSO_ANCHOR.MIDDLE) add_text(s, Inches(8.3), y, Inches(4.55), Inches(0.4), v, size=11, color=DARK, anchor=MSO_ANCHOR.MIDDLE) # 底部 take-away add_rect(s, Inches(0.4), Inches(6.05), Inches(12.5), Inches(0.85), RGBColor(0xFE, 0xF6, 0xF4), line=LIGHT, line_w=Pt(0.5)) add_text(s, Inches(0.6), Inches(6.15), Inches(12.1), Inches(0.4), "架构师关注点", size=12, bold=True, color=AMD_RED) add_text(s, Inches(0.6), Inches(6.5), Inches(12.1), Inches(0.4), "OCP ORW 意味着机柜几何与 Meta 同代 — 二手替代与维护件互通；44 OU 高度超过传统 42U", size=11, color=DARK) add_footer(s, 6) # ============================================================ # Slide 7 · UALoE scale-up 协议栈深度 # ============================================================ s = prs.slides.add_slide(BLANK) add_title_bar(s, "UALoE Scale-up 互联协议栈", "Ultra Accelerator Link + Ultra Ethernet = 260 TB/s scale-up 带宽") # 左：UALoE 实物 img_ok = safe_img(s, f"{IMG_DIR}/wx-helios-12.jpg", Inches(0.4), Inches(1.2), Inches(6.5), Inches(4.5)) if not img_ok: add_rect(s, Inches(0.4), Inches(1.2), Inches(6.5), Inches(4.5), PANEL, line=LIGHT, line_w=Pt(0.75)) # 右：协议栈 4 层 add_text(s, Inches(7.2), Inches(1.2), Inches(5.7), Inches(0.4), "UALoE 协议栈", size=14, bold=True, color=AMD_RED) stack = [ ("L7 应用层", "PyTorch / vLLM / Triton / SGL"), ("L4 传输层", "Ultra Ethernet（UEC 规范）"), ("L3 链路层", "UALink 1.0（基于 PCIe 语义）"), ("L1 物理层", "Broadcom Tomahawk 6 · 102.4 Tbps/ASIC"), ] for i, (k, v) in enumerate(stack): y = Inches(1.7 + i * 0.85) add_rect(s, Inches(7.2), y, Inches(5.7), Inches(0.75), PANEL, line=LIGHT, line_w=Pt(0.5)) add_rect(s, Inches(7.2), y, Inches(1.8), Inches(0.75), AMD_RED) add_text(s, Inches(7.2), y, Inches(1.8), Inches(0.75), k, size=12, bold=True, color=WHITE, align=PP_ALIGN.CENTER, anchor=MSO_ANCHOR.MIDDLE) add_text(s, Inches(9.1), y, Inches(3.7), Inches(0.75), v, size=11, color=DARK, anchor=MSO_ANCHOR.MIDDLE) # 底部架构师对比 add_text(s, Inches(7.2), Inches(5.4), Inches(5.7), Inches(0.4), "vs NVIDIA NVLink 6", size=13, bold=True, color=AMD_RED) add_text(s, Inches(7.2), Inches(5.85), Inches(5.7), Inches(1.2), ("• NVLink 6 是专有交换 ASIC + NVLink 协议；UALoE 是开放 UALink 1.0 + Ultra Ethernet\n" "• AMD 多供应商：Broadcom Tomahawk 6 / Marvell / Nvidia Spectrum（理论上）\n" "• 总带宽持平（260 TB/s），但 UALoE 在 100+ 联盟成员互通性是关键开放叙事"), size=11, color=DARK) add_footer(s, 7) # ============================================================ # Slide 8 · Pensando 网络栈（Salina + Vulcano） # ============================================================ s = prs.slides.add_slide(BLANK) add_title_bar(s, "Pensando 网络栈 · Salina DPU + Vulcano 800G AI NIC", "AMD 自研网卡 + DPU — 存储 / 网络 / 安全 offload") # 左侧：内部液冷铜板（含 NIC 可见） img_ok = safe_img(s, f"{IMG_DIR}/wx-helios-08.webp", Inches(0.4), Inches(1.2), Inches(6.5), Inches(4.5)) if not img_ok: add_rect(s, Inches(0.4), Inches(1.2), Inches(6.5), Inches(4.5), PANEL, line=LIGHT, line_w=Pt(0.75)) # 右侧：两个组件详解 add_text(s, Inches(7.2), Inches(1.2), Inches(5.7), Inches(0.4), "Vulcano 800G AI NIC（scale-out）", size=13, bold=True, color=AMD_RED) add_text(s, Inches(7.2), Inches(1.65), Inches(5.7), Inches(2.0), ("• 3 张 / GPU → 单机架 216 张 NIC\n" "• 单卡 800 Gb/s → 单机架 2.4 Tbps / GPU 接入\n" "• PCIe 6.0 ×16 host interface\n" "• 支持 UAL / UEC 标准\n" "• AMD 自述：scale-out 带宽 +50% / 成本 -33%"), size=11, color=DARK) add_text(s, Inches(7.2), Inches(3.85), Inches(5.7), Inches(0.4), "Salina DPU（存储 / 网络 / 安全 offload）", size=13, bold=True, color=AMD_RED) add_text(s, Inches(7.2), Inches(4.3), Inches(5.7), Inches(2.0), ("• 400 Gb/s 线速 / 单 DPU\n" "• 100 MPPS 吞吐\n" "• 加密 offload 400 Gb/s\n" "• 4 M IOPS（NVMe 存储）\n" "• 替代 BlueField-4 DPU 的 AMD 自研方案"), size=11, color=DARK) add_footer(s, 8) # ============================================================ # Slide 9 · ROCm 7 软件栈 # ============================================================ s = prs.slides.add_slide(BLANK) add_title_bar(s, "ROCm 7 软件栈 · 开放 AI 推理 / 训练调度", "ROCm.ai 智能体框架 + Gorgon Halo 推理调度器") # 左：3 层栈示意 add_text(s, Inches(0.4), Inches(1.2), Inches(6.2), Inches(0.4), "ROCm 7 分层架构", size=14, bold=True, color=AMD_RED) layers = [ ("L4 AI 智能体", "ROCm.ai（agent framework）", AMD_RED), ("L3 调度器", "Gorgon Halo（推理调度）", DARK), ("L2 框架", "PyTorch / Triton / vLLM / SGL / ONNX", DARK), ("L1 编译栈", "MIOpen / Composable Kernel / HipBLASLt", DARK), ("L0 驱动 / HAL","ROCr Runtime + KFD", DARK), ] for i, (k, v, col) in enumerate(layers): y = Inches(1.7 + i * 0.85) add_rect(s, Inches(0.4), y, Inches(6.2), Inches(0.75), PANEL, line=LIGHT, line_w=Pt(0.5)) add_rect(s, Inches(0.4), y, Inches(0.15), Inches(0.75), col) add_text(s, Inches(0.7), y, Inches(1.7), Inches(0.75), k, size=12, bold=True, color=col, anchor=MSO_ANCHOR.MIDDLE) add_text(s, Inches(2.5), y, Inches(4.0), Inches(0.75), v, size=11, color=DARK, anchor=MSO_ANCHOR.MIDDLE) # 右：生态兼容矩阵 add_text(s, Inches(6.9), Inches(1.2), Inches(6.0), Inches(0.4), "生态兼容性矩阵（架构师关注）", size=14, bold=True, color=AMD_RED) headers = ["组件", "ROCm 7 状态", "风险"] rows = [ ("PyTorch upstream", "✅ 主线支持", "低"), ("vLLM", "✅ Day-0 支持", "中（CUDA 优化领先）"), ("Triton", "✅ 兼容", "低"), ("ONNX Runtime", "✅ 兼容", "低"), ("Hugging Face", "✅ 主流模型已移植", "中"), ("Llama.cpp", "✅ 支持", "低"), ("Anthropic SDK", "⚠️ 部分兼容", "中"), ("NVIDIA Triton", "❌ 不兼容", "高（专有）"), ] add_table(s, Inches(6.9), Inches(1.7), col_w=[Inches(2.2), Inches(2.5), Inches(1.3)], headers=headers, rows=rows, row_h=Inches(0.42), font_size=10, col_color=[None, AMD_RED, WARN]) # 底部 take-away add_text(s, Inches(0.4), Inches(6.3), Inches(12.5), Inches(0.4), "12 个月内最大风险：vLLM 与 CUDA 优化栈的 9 成以上兼容性", size=13, bold=True, color=AMD_RED, align=PP_ALIGN.CENTER) add_text(s, Inches(0.4), Inches(6.7), Inches(12.5), Inches(0.3), "ROCm 7 已兼容主流框架，但 MoE all-to-all 通信效率 / KV cache 命中率需 2026 Q4 实测", size=10, color=GREY, align=PP_ALIGN.CENTER) add_footer(s, 9) # ============================================================ # Slide 10 · 功耗 · 散热 · 电源设计 # ============================================================ s = prs.slides.add_slide(BLANK) add_title_bar(s, "功耗 · 散热 · 电源 · 液冷设计", "225–245 kW / 机架 · COLD/HOT 进出水 · vertical busbar") # 顶部 3 个功耗数字 power = [ ("225–245", "kW", "整机功耗 / 机架"), ("~600", "W", "单 GPU 散热功耗（推算）"), ("48V", "DC", "集中供电母线电压"), ] for i, (big, unit, desc) in enumerate(power): x = Inches(0.4 + i * 4.3) add_rect(s, x, Inches(1.2), Inches(4.0), Inches(1.3), PANEL, line=AMD_RED, line_w=Pt(1.5)) add_text(s, x, Inches(1.25), Inches(2.5), Inches(1.25), big, size=36, bold=True, color=AMD_RED, align=PP_ALIGN.RIGHT, anchor=MSO_ANCHOR.MIDDLE) add_text(s, x + Inches(2.6), Inches(1.25), Inches(1.3), Inches(0.5), unit, size=16, bold=True, color=DARK, anchor=MSO_ANCHOR.MIDDLE) add_text(s, x + Inches(2.6), Inches(1.75), Inches(1.3), Inches(0.5), desc, size=11, color=GREY, anchor=MSO_ANCHOR.TOP) # 左下：液冷方案 add_text(s, Inches(0.4), Inches(2.75), Inches(6.2), Inches(0.4), "液冷方案", size=14, bold=True, color=AMD_RED) add_text(s, Inches(0.4), Inches(3.2), Inches(6.2), Inches(3.2), ("• 冷板直贴 GPU + HBM4（一块冷板覆盖 4 GPU 区域）\n" "• COLD 进口：约 25–35 °C\n" "• HOT 出口：约 45–55 °C（数据中心回收热源）\n" "• 流量：单机架 30–50 L/min（推算）\n" "• 相比风冷：单机柜密度 +5×，PUE 可达 1.1 以下\n" "• 风冷不可行 — AMD 强制要求液冷"), size=11, color=DARK) # 右下：电源方案 add_text(s, Inches(6.9), Inches(2.75), Inches(6.0), Inches(0.4), "电源方案", size=14, bold=True, color=AMD_RED) add_text(s, Inches(6.9), Inches(3.2), Inches(6.0), Inches(3.2), ("• Vertical busbar 集中供电（机柜顶部纵向母排）\n" "• 6 个 PSU 冗余（5+1）\n" "• 48V DC 直接到托盘（中间无 AC/DC 二次转换）\n" "• 优势：减少转换损耗（90% → 96% 效率）\n" "• 数据中心侧：10–15 MW 单栋楼，需配套 CDU（冷却液分配单元）"), size=11, color=DARK) add_footer(s, 10) # ============================================================ # Slide 11 · TCO 测算模型（架构师向） # ============================================================ s = prs.slides.add_slide(BLANK) add_title_bar(s, "TCO 测算模型 · 假设透明可调", "硬件 / 功耗 / 软件 / 维护 4 项分摊 — tokens/$ 横向对比") # 表头 headers = ["TCO 项目", "AMD Helios / 年", "NVIDIA Rubin NVL72 / 年", "备注"] rows = [ ("硬件摊销（5 年）", "$1.0–1.1M", "$0.8–0.9M", "Helios 单架 $5.0–5.5M"), ("数据中心空间", "$30–50k", "$30–50k", "44 OU 同等占地"), ("功耗（225–245 kW）", "$280–320k", "$300–340k", "@$0.12/kWh"), ("液冷 CDU 摊销", "$40–60k", "$40–60k", "水冷基础设施"), ("软件 / 维护 / ROCm", "$80–120k", "$50–80k", "Helios 软件溢价"), ("人才 / 运维", "$100–150k", "$80–120k", "ROCm 工程师稀缺"), ("— 合计 —", "$1.53–1.79M/年", "$1.30–1.59M/年", "Helios 高 ~15%"), ("tokens/$（AMD 自测）", "+30% 更优", "基准", "需第三方实测"), ] add_table(s, Inches(0.4), Inches(1.2), col_w=[Inches(2.5), Inches(3.0), Inches(3.5), Inches(3.5)], headers=headers, rows=rows, row_h=Inches(0.5), col_color=[None, AMD_RED, NV_GREEN, GREY]) # 底部敏感性 add_rect(s, Inches(0.4), Inches(5.85), Inches(12.5), Inches(1.1), RGBColor(0xFE, 0xF6, 0xF4), line=LIGHT, line_w=Pt(0.5)) add_text(s, Inches(0.6), Inches(5.95), Inches(12.1), Inches(0.4), "敏感性结论", size=14, bold=True, color=AMD_RED) add_text(s, Inches(0.6), Inches(6.4), Inches(12.1), Inches(0.5), ("• 若 tokens/$ +30% 属实 → Helios 实际 TCO 反低 ~10%\n" "• 若 NVIDIA 量产加速到 Q4 → Helios 溢价窗口收窄"), size=11, color=DARK) add_footer(s, 11) # ============================================================ # Slide 12 · 迁移路径与采购决策清单 # ============================================================ s = prs.slides.add_slide(BLANK) add_title_bar(s, "迁移路径 · 12 个月架构落地清单", "PoC → 灰度 → 生产 — 架构师交付物时间表") # 时间线 5 节点 phases = [ ("Q3 2026", "PoC", "2 节点 + 2 GPU", "技术验证"), ("Q4 2026", "Bench", "1 机架", "tokens/$ 实测"), ("Q1 2027", "灰度", "3 机架", "1 个生产模型迁移"), ("Q2 2027", "生产", "10+ 机架", "全集群切换 50%"), ("Q4 2027", "规模", "30+ 机架", "完整 Helios 集群"), ] nx0 = Inches(0.4); ny = Inches(1.4); nw = Inches(2.45); nh = Inches(1.8) gap = Inches(0.05) for i, (t, k, scope, goal) in enumerate(phases): x = nx0 + (nw + gap) * i col = AMD_RED if i == 0 else (DARK if i < 3 else RGBColor(0x40, 0x44, 0x55)) add_rect(s, x, ny, nw, Inches(0.5), col) add_text(s, x, ny, nw, Inches(0.5), t, size=13, bold=True, color=WHITE, align=PP_ALIGN.CENTER, anchor=MSO_ANCHOR.MIDDLE) add_rect(s, x, ny + Inches(0.5), nw, nh - Inches(0.5), PANEL, line=LIGHT, line_w=Pt(0.5)) add_text(s, x + Inches(0.1), ny + Inches(0.6), nw - Inches(0.2), Inches(0.4), k, size=15, bold=True, color=AMD_RED) add_text(s, x + Inches(0.1), ny + Inches(0.95), nw - Inches(0.2), Inches(0.4), scope, size=11, color=DARK) add_text(s, x + Inches(0.1), ny + Inches(1.3), nw - Inches(0.2), Inches(0.4), goal, size=10, color=GREY) # 底部 checklist 3 项 add_text(s, Inches(0.4), Inches(3.5), Inches(12.5), Inches(0.4), "架构师 3 项关键交付", size=14, bold=True, color=AMD_RED) items = [ ("Q3 末前", "完成 ROCm 7 + vLLM 0.7+ 在 70B/400B 模型上的吞吐 / 延迟 baseline"), ("Q4 中前", "建立 MoE all-to-all 通信效率与 CUDA 同模型对比基线（误差 < 15%）"), ("Q1 2027 前","完成 UALoE scale-up 多供应商交换互通性测试（Broadcom / Marvell / 至少 1 家）"), ] for i, (k, v) in enumerate(items): y = Inches(3.95 + i * 0.7) add_rect(s, Inches(0.4), y, Inches(12.5), Inches(0.6), PANEL if i % 2 == 0 else WHITE, line=LIGHT, line_w=Pt(0.5)) add_rect(s, Inches(0.4), y, Inches(1.6), Inches(0.6), AMD_RED) add_text(s, Inches(0.4), y, Inches(1.6), Inches(0.6), k, size=12, bold=True, color=WHITE, align=PP_ALIGN.CENTER, anchor=MSO_ANCHOR.MIDDLE) add_text(s, Inches(2.1), y, Inches(10.7), Inches(0.6), v, size=12, color=DARK, anchor=MSO_ANCHOR.MIDDLE) # 风险提示条 add_rect(s, Inches(0.4), Inches(6.2), Inches(12.5), Inches(0.75), WARN) add_text(s, Inches(0.4), Inches(6.2), Inches(12.5), Inches(0.75), "决策前提：等待第三方 Semianalysis / TrendForce 实测数据，2026 Q3 末前不签超过 5 机架的批量合同", size=13, bold=True, color=WHITE, align=PP_ALIGN.CENTER, anchor=MSO_ANCHOR.MIDDLE) add_footer(s, 12) # ---- 保存 ---- prs.save(OUT_PPTX) print(f"OK saved → {OUT_PPTX}") print(f"Slides: {len(prs.slides)}")